Nv2a-vsh

Fixes an issue where paired ILU instructions were allowed to target temp registers other than R1.
On hardware the temp register index is ignored if the ILU operates in paired mode, it will write to R1 regardless of the encoded index.

**Full Changelog**: https://github.com/abaire/nv2a_vsh_asm/compare/v0.1.0...v0.1.1

Fails assembly on parser errors.

**Full Changelog**: https://github.com/abaire/nv2a_vsh_asm/compare/v0.0.9...v0.1.0

v0.1.0-test
Fails assembly entirely if there are errors during parsing.

**Full Changelog**: https://github.com/abaire/nv2a_vsh_asm/compare/v0.0.9...v0.1.0-test

Disallows reads from more than one C register (which previously was silently converted to read from the last C register both times)

Adds support for writes to the 'constant' (c[0]...) registers.

What's Changed
* Adds support for double-out instructions. by abaire in https://github.com/abaire/nv2a_vsh_asm/pull/11


**Full Changelog**: https://github.com/abaire/nv2a_vsh_asm/compare/v0.0.6...v0.0.7

v0.0.7-test
What's Changed
* Adds support for double-out instructions. by abaire in https://github.com/abaire/nv2a_vsh_asm/pull/11


**Full Changelog**: https://github.com/abaire/nv2a_vsh_asm/compare/v0.0.6...v0.0.7-test

Adds support for the `R12` alias of `oPos`.
Exposes lower level assemble/disassemble functionality for use in [nv2a_vsh_debug](https://github.com/abaire/nv2a_vsh_debug).
Exposes partial disassembly of instructions for use in [nv2a_vsh_debug](https://github.com/abaire/nv2a_vsh_debug).

v0.0.6-test
Adds support for `R12` `oPos` alias.
Exposes lower level assemble/disassemble functionality for use in nv2a_vsh_debug.
Exposes partial disassembly of instructions for use in nv2a_vsh_debug.