Sysloss

Latest version: v1.10.0

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1.10.0

Bug Fixes

- Divide by zero in make_hdiag() when system has no losses
([`1036877`](https://github.com/geddy11/sysloss/commit/1036877eaf64498d407ae49296fa281fe17d6e2c))

Documentation

- Correct make_diag() docstring
([`f947070`](https://github.com/geddy11/sysloss/commit/f947070680f64b9d1cf4bd832d571366a601aa8a))

Features

- Add plane_res() function to utils package
([`a7ffd49`](https://github.com/geddy11/sysloss/commit/a7ffd49821663eaaf84bd866925a0ccc58766b6c))

Refactoring

- Add pytest package to test_utils.py
([`65159e9`](https://github.com/geddy11/sysloss/commit/65159e97967f0c9e24a3c6d7a535abc70ef57cc1))

- Change dtype in _prep_loss()
([`7c8a463`](https://github.com/geddy11/sysloss/commit/7c8a463c77696cc5bede3090cfaf295a3193d72b))

1.9.0

Documentation

- Add heat diagram to "Power tree diagrams" tutorial, set default font to Arial and default
component color to light gray
([`9792759`](https://github.com/geddy11/sysloss/commit/9792759d34086b866c42abf7410baa887dda6d95))

- Add PCB trace resistance to PCIe FPGA tutorial
([`8c505dc`](https://github.com/geddy11/sysloss/commit/8c505dc46ba5a6fc8ef41ac654365e92696949f4))

- Include highlights only in rtd changelog
([`7421be3`](https://github.com/geddy11/sysloss/commit/7421be3049833883fba5df5716a07382cad1c013))

Features

- Add heat diagram function, make_hdiag(), to diagram package
([`2e4a563`](https://github.com/geddy11/sysloss/commit/2e4a56365bf62481578d025e6ff3de0a4950849e))

- Add utils package with trace_REs() function
([`c1606ad`](https://github.com/geddy11/sysloss/commit/c1606ad7a9ef084aef7f8469a075f6a6a56c5ddd))

Refactoring

- Remove unused package
([`04d1e61`](https://github.com/geddy11/sysloss/commit/04d1e613e6569290cdf5e3494515e3f5dbce16a4))

1.8.1

Build System

- Add pytest-codspeed to dev dependencies
([`eb14c66`](https://github.com/geddy11/sysloss/commit/eb14c662085a932322c5eb982ca7ca29174bbe29))

Continuous Integration

- Add Codspeed benchmarking
([`9914d8a`](https://github.com/geddy11/sysloss/commit/9914d8a079639d8deddf906bb7ec0790d6607c58))

- Add CodSpeed dependencies
([`1b1d522`](https://github.com/geddy11/sysloss/commit/1b1d5226285f591aca10f0a049b5d01b43405602))

- Add matplotlib to CodSpeed
([`9045184`](https://github.com/geddy11/sysloss/commit/90451846cb565091202d6fbde25f63fb36eb73a4))

- Add missing dependencies for CodSpeed
([`26e449b`](https://github.com/geddy11/sysloss/commit/26e449b25189c6f2ce1c2909dbce366d47ce9d1d))

- Add pydot to CodSpeed deps
([`52eb41d`](https://github.com/geddy11/sysloss/commit/52eb41d57bdc24df8df44c9aa6f1da4afd33fa27))

- Add tqdm to CodSpeed deps.
([`c681974`](https://github.com/geddy11/sysloss/commit/c681974a5d7b26eb8800dcaa554d3cf57cdc9891))

Documentation

- Add changelog to documentation
([`1836349`](https://github.com/geddy11/sysloss/commit/18363498cecfe210a3f652925bef3a5cf7f251ee))

Performance Improvements

- Add benchmark tests
([`0ba69e6`](https://github.com/geddy11/sysloss/commit/0ba69e68f17cfbb4084bdbbd04c6145510cea363))

1.8.0

Documentation

- Add Rectifier to component parameter files tutorial
([`73f2be9`](https://github.com/geddy11/sysloss/commit/73f2be947699ccb324ec337a6a35e470b67cf284))

- New tutorial: power over ethernet analysis
([`cce4a1f`](https://github.com/geddy11/sysloss/commit/cce4a1fca20139c9a79bbac2b15a0fc86f0723c7))

Features

- New component PMux (Power Multiplexer)
([`ad3079f`](https://github.com/geddy11/sysloss/commit/ad3079f7a84d7a7bbbd482b0ffe2f42d0dcd1956))

- New component Rectifier - diode and MOSFET modes
([`2e4ea83`](https://github.com/geddy11/sysloss/commit/2e4ea834e0a3acd225e61bd348058651cef68076))

- Source component can now have load phases defined
([`653321d`](https://github.com/geddy11/sysloss/commit/653321df33ada9688e3ccd446bce5e5d629ed161))

Refactoring

- Add check for component interpolation data format
([`b5575f7`](https://github.com/geddy11/sysloss/commit/b5575f7f1aa41b9da3f53ec7b8db2cd113f7f3af))

- Change to generic .from_file() method in Component class
([`ad4b91d`](https://github.com/geddy11/sysloss/commit/ad4b91d2f0b0f1912016ec7a541931c34baff935))

1.7.0

Bug Fixes

- Add loss parameter reading to System.from_file()
([`94b419a`](https://github.com/geddy11/sysloss/commit/94b419a3cddeaae62d509d32616f4a99cf8f5aa4))

Continuous Integration

- Remove sudo from readthedocs .yml
([`2e17b54`](https://github.com/geddy11/sysloss/commit/2e17b543524a8ab2102cf743cf33934abb7db0fe))

- Use "apt_packages" to install graphviz for rtd
([`41168e0`](https://github.com/geddy11/sysloss/commit/41168e0e559be9c5e52e707bcebb5e21df1d75d5))

Documentation

- Update readme.md with make_diag()
([`13c3923`](https://github.com/geddy11/sysloss/commit/13c39236b0bbba27dd777dc70a71a08f693d187a))

Features

- Add "loss" parameter to all loads, optionally configuring power as a loss
([`8168a26`](https://github.com/geddy11/sysloss/commit/8168a26583bd4afbedb020e808a6e1502089e09e))

- Add .rail_rep() method to System (voltage rail report)
([`92ec728`](https://github.com/geddy11/sysloss/commit/92ec7281437aaa4c1418e42703b9caa6355c8b79))

- Add group parameter to make_diag() function
([`1d8f9e4`](https://github.com/geddy11/sysloss/commit/1d8f9e4d94af37d66fb2caa48b4dab86c518121d))

- Add the option to add voltage rail names in System
([`a956ecb`](https://github.com/geddy11/sysloss/commit/a956ecbbe724f862cb546ed00907997b283d261d))

- Allow power rail name as parent parameter in add_comp(), change_comp()
([`6019576`](https://github.com/geddy11/sysloss/commit/6019576fd61e7f7652a82f5d42d80f337a5f7793))

Refactoring

- Add check of limit values format
([`3136295`](https://github.com/geddy11/sysloss/commit/31362953fe3dfacc4210451831b04f59580f0c74))

- Create generic _solv_get_warns() method in Component class
([`4e2e8cc`](https://github.com/geddy11/sysloss/commit/4e2e8cc87708ee2da3c8d0b2091275246a2629e6))

1.6.0

Bug Fixes

- When saving system to .json, only include applicable limits for each component
([`fd5dea7`](https://github.com/geddy11/sysloss/commit/fd5dea76bfb9e03d18106f2c69992e7a12fd7419))

Continuous Integration

- Add graphviz to rtd config
([`8fb1728`](https://github.com/geddy11/sysloss/commit/8fb1728f523243daa808063e6c6cf90dda831d31))

- Add sudo to graphviz install
([`20185f6`](https://github.com/geddy11/sysloss/commit/20185f6e94b00672bad6079fd369eeb2741be345))

- Fix Graphviz install
([`a46675b`](https://github.com/geddy11/sysloss/commit/a46675bdd63934b41d9dc4f70d7ecde5ad1f7935))

- Install Graphviz in ci step
([`eb026a2`](https://github.com/geddy11/sysloss/commit/eb026a2d8e73b1a08e5198ebdaf686cf772dabb6))

- Remove grayscull steps
([`553c2ed`](https://github.com/geddy11/sysloss/commit/553c2eda3537c314a1fec18522488c57037d0fcd))

Documentation

- Update LinReg ground current parameter name in PCIe tutorial
([`b9da44b`](https://github.com/geddy11/sysloss/commit/b9da44b76a3b8feeae9cead7eae2758a36881c65))

Features

- Add graphical power tree diagrams module
([`e3bb445`](https://github.com/geddy11/sysloss/commit/e3bb445587c0f1daf6c46b4b451c85943cfa0e77))

- Add group parameter in System, allowing grouping of components
([`83d9965`](https://github.com/geddy11/sysloss/commit/83d9965b9619d9d2748d9177dcbb07abdb81d91e))

Refactoring

- Add generic component class
([`31873dd`](https://github.com/geddy11/sysloss/commit/31873dd3bf7dd3e320165aef00b7ce4e9071d215))

- Remove duplicate code in Components
([`488d451`](https://github.com/geddy11/sysloss/commit/488d4514117e2a35c962d845d55522380e9f4048))

- Use pydot in make_diagram() to support clusters (component groups)
([`6a53558`](https://github.com/geddy11/sysloss/commit/6a53558c52f3ee703d3f93837ec959d5819326d3))

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