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Added
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* Processor, arithmetic-logic unit, and 10-bit bus modules to processor subpackage
* Bitwise logic operations to logic subpackage
* Bitwise AND, NAND, NOR, NOT, OR, XNOR, and XOR operations for 4-, 8-, and 16- bit inputs
* Multiplier classes to arithmetic subpackage
* ``Multiplier2``
* ``Multiplier4``
* ``Multiplier8``
Changed
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* Fixed enable inputs in the following modules to no longer act as a positive clock edge
* ``ParallelToSerialConverter4To1``
* ``ParallelToSerialConverter8To1``
* ``ParallelToSerialConverter16To1``
* ``ShiftRegister4``
* ``ShiftRegister8``
* ``ShiftRegister16``
* ``SerialToParallelConverter1To4``
* ``SerialToParallelConverter1To8``
* ``SerialToParallelConverter1To16``
* Added enable inputs to registers in ``storage.REG``
* Changed ordering of parameters to ``TristateBuffer``