- Zynq Ultrascale+ MPSoC support - (Breaking change) No python 2.x support
Test environment ====
0.3.1
Update ====
- You can specify a IP-core name as you like.
Test environment ====
0.3.0
Update ====
- Pretty console output for Veriloggen.
Test environment ====
0.2.1
Update ========
- Application body and user-interface script are separated for use as a library from other applications. - The affiliation of the main developer has been changed.