Added
- Added an `initialize_registers` option to `output_to_verilog`
([documentation](https://pyrtl.readthedocs.io/en/latest/export.html#pyrtl.importexport.output_to_verilog))
Changed
- Improved handling of signed integers.
Fixed
- Fixed a `wire_matrix` bug involving single-element matrices of `Inputs` or `Registers`.