Signalintegrity

Latest version: v1.4.1

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1.4.1

This release adds some speedups, fixes a few bugs, and adds a series device

Bug Fixes
Cache Recalculation
An error was found that projects sometimes required recalculation of the cached solution, even if they had already been calculated. This bug was not commonly encountered by users and happened only for scripted solutions.

All of the tests were fixed, as well.

Features
Allow Archiving of Cached Results
When archiving, cached results can be archived as well (selectable in the preferences). Unfortunately, due to some limitations in Python, these cached results will need recalculation, unless the archive is extracted using a utility, rather than _SignalIntegrity_. This will be resolved in the future.

Series Device
A multi-port (even number of ports) device can be dropped into a schematic that calculates the cascade multiple times of a referenced project or s-parameter file. This is useful for converting transmission line models (that might not exactly fit the RLGC paradigm) into distributed models.

Speedups
Since SignalIntegrity is currently being used for some very large simulations, efforts were made to profile and reduce wasted time in the calculations. These are for simulations and s-parameter generation.

1.4.0

This release updates code and tests to ensure proper operation on Python 3.11 and adds the Clock Recovery feature

Bug Fixes
Imports on Python 3.11
Errors were found in Python 3.11 for imports. Namely, you cannot import SignalIntegrity as si and then reference the packages in SignalIntegrity.Lib. Technically this should have worked, but it doesn't. The code was corrected to do this properly.

All of the tests were fixed, as well.

Features
Useless imports removed
When users are trying to use the SignalIntegrity.Lib libraries without the GUI, the imports in the __init__ file of SignalIntegrity was preventing desired operation. These imports have been removed, which were superfluous anyway. Closes 73.

Clock Recovery
Now, data communications waveforms can be read from oscilloscopes and the clock is recovered from the waveform. Previously, the clock was assumed perfectly related to the sample clock, and eye diagrams were just smeared messes.

Eye Diagrams can be turned off
Now, eye diagrams can be turned off, allowing the waveforms to be generated, but not the eye diagram. This helps when performing long simulations and tuning.

Documentation and Help System
While still not perfect, all of the features are up to date in both the software documentation and the help system.

1.3.5

This release is the first release since SignalIntegrity was moved to [Nubis Communications](https://www.nubis-inc.com/). Signal Integrity is now a Nubis Communications supported open-source tool.

Bug Fixes
Test Fixes
Previously, the unit tests could fail based on the order they were run. This was a frustrating problem that existed for quite a long time. This problem has now been fixed.

Zero Length RLGC Transmission Lines
These now work properly and don't cause an error.

Dramatic Speedup for Port Reordering
Port reordering now runs much faster due to lack of extensive copying.

Variables with Spaces
Variables values can now have spaces (mostly for strings) and are now handled properly by enclosing the strings in quotes.

Features
Logarithmically Spaced Frequency Points
During some PDN analysis work, it became painfully obvious that the low frequency aspects dictate very small frequency resolution and therefore lots of frequency points to perform the simulation. An attempt was made to mitigate this by introducing solutions that are made on logarithmically spaced frequency points (a much smaller number of points) and then resampling them at the end onto a linear frequency scale for convolution in simulations. This didn't work perfectly (and it still doesn't), but the feature is added (experimentally). You can try this out by setting the preference that allows this in the projects.

Reference Impedance for Solutions
Previously, all solutions were performed in a 50 ohm reference impedance. Any devices read in, were converted to 50 ohms. If the desire was to have a result in a different reference impedance, this could always be accomplished by post processing, converting the result to whatever reference impedance was desired. Now, the user has the capability to specify the reference impedance to perform the solution at. All devices are converted to the user specified reference impedance for the solution.

Parallel Devices
A new two-port device was added that calculates a device that is the equivalent of a defined two-port s-parameter device placed in a parallel arrangement multiple times. This is useful for parallel pins on connectors, parallel wire bonds, and parallel bypass capacitors -- it greatly simplifies these calculations.

Added COM defined Two-port Transmission Line
A device that implements the IEEE COM definition of the transmission lines has been added, which enables the user to build complete COM package models and PCB traces.

Ignore Missing Other Waveforms
Waveforms whose results are read from the disk during simulation can now be ignored if they are missing, allowing the simulation to continue normally.

Added Cache Control for Variables
Some variables, when changed, should not require recalculation of the entire solution. Now, users can declare variables that should not be in the cache definition.

1.3.3

Bug Fixes
Import Errors
Closed 71 LineCollection
Previously I had tried to import Matplotlib as late as possible to avoid some other problems and did this incorrectly. When users selected variable line width, the program became unusable. This has been fixed.
Transfer Matrices
Not really a bug, but transfer matrices were unable to be computed in a simulation if the waveforms were not available. Now they can be computed without the waveforms.
Splines
These were really slow using home-grown spline software. Now this uses the scypi splines, which are much faster. This improves the time in complicated resampling operations.
Features
Encryption
The encryption feature allows encryption of _SignalIntegrity_ projects and s-parameters. Now, in the preferences, there are two additions:
- encryption password - defaults to None
- file ending for encryption - defaults to $
if project files are saved that end in the ending specified, and there is a password, the project file is encrypted. If any encryped file is read, it is decrypted with this password.
passwords for decryption and encryption are overridden, and explicitly stating the password on the commend line using the --pwd option when invoking _SignalIntegrity_. The password provided on the command line is passed down through projects that are included in the project file. This allows for complete encryption of nested projects, including their s-parameters, for deployment in systems that use _SignalIntegrity_ for simulations or calculations in other programs.
Control Changes
Now, shift-select instead of control-select is used for multiple selections, like most software. Control-select now immediately opens the part properties, which is more convenient.
DC Waveforms
These can now be shown in simulation results.
Causality Enforcement
Now, an option exists to enforce preservation of the DC point during causality enforcements. While this is not always the best thing, it is definitely the best thing when performing PDN analysis. Not preserving the DC point causes IR drops to be miscalculated.

1.3.2

Bug Fixes
Caching
Previously, there were cases involving schematics with variables and equations (newly added features) that caused sub-schematics to not be recomputed. This has been fixed.
Archiving
Previously there were rare cases that the resulting archive would be broken in that referenced files within the archive were referenced incorrectly. This has been fixed.
Features
Progress Bar
Up until now, the progress bar showed the progress of the calculation of the top level schematic. This meant that in deeply heirarchical projects, the progress bar was frozen as the calculation gathered up s-parameters calculated from sub-schematics. Now, the callback function is passed down to nested subprojects and the progress of the calculation of these subprojects is shown. This allows the user to see what is actually being calculated, where the calculation time is being spent, and the GUI thread is no longer blocked. Furthermore, calculations can now be aborted when the calculation is being performed on these subprojects.

See [Installation](https://github.com/TeledyneLeCroy/SignalIntegrity/wiki/Installation) for installation instructions.

1.3.1

Features
Equations
This release adds equations to schematics. For example, here is a schematic that uses a wirebond model:
![image](https://user-images.githubusercontent.com/16583311/222932129-fc2358b6-a93f-4259-945f-c06f9afd92dd.png)
Note that the schematic specifies a length L, a diameter D, and a material gold for the wirebond.
Looking at the referenced device:
![image](https://user-images.githubusercontent.com/16583311/222932190-1e568151-dc06-4bba-8814-161a61c70b65.png)
and opening the referenced file:
![image](https://user-images.githubusercontent.com/16583311/222932214-a04fadd2-fdd3-4e26-be84-923adff96695.png)
we see that it has variables associated with the schematic L, D, material, and rho, ur, and valid.
Opening the schematic variables, we see these variables:
![image](https://user-images.githubusercontent.com/16583311/222932259-1af8c266-38f9-427a-b66c-d20efbf04c13.png)
but the variables rho, ur, and valid are read only (they are what are called output variables).
Opening the script with the button that shows f(x), we see the script that converts the input variables to the output variables:
![image](https://user-images.githubusercontent.com/16583311/222932296-ea6671d1-1d1d-4de8-b501-3b6f67063e9b.png)
The script takes only the material and determines the relative permeability (ur) and the resistivity (rho). These are variables on the device in the schematic:
![image](https://user-images.githubusercontent.com/16583311/222932365-508bc607-edf0-480a-9ab6-16ceac4fc46f.png)
Again, we view the referenced device:
![image](https://user-images.githubusercontent.com/16583311/222932395-6e4ab1cf-d206-45b0-ada2-3779a0d1077b.png)
Here, we have the final wirebond model with the associated inductance and resistance. Again, looking at the schematic variables:
![image](https://user-images.githubusercontent.com/16583311/222932428-8bcb8687-507a-414b-9a22-a333379a5f68.png)
and the script:
![image](https://user-images.githubusercontent.com/16583311/222932478-d3b01a03-15d0-4497-81a0-cee5b0f04142.png)
We can see how this inductance and resistance was calculated.

Have fun with this new feature!
Minor Features
Level Annotations to Eye Diagrams
![image](https://user-images.githubusercontent.com/16583311/222932632-83747e3c-ace5-4248-af74-0250ddf3b3f1.png)
These are available from the eye diagram properties dialog.
Long Text in Device Properties
With the advent of all of the schematic variables in the last release, some very long text in device properties is possible, which really makes the schematics ugly. In the preferences you can select for the numbers displayed in floats, and for the maximum size of text in the properties. For example:
![image](https://user-images.githubusercontent.com/16583311/222932743-15bdd92a-cc06-4c96-bbec-b0da52517826.png)
Note that the long equation now ends in ...
Bugs
Many minor bugs were fixed that are not worth mentioning.

See [Installation](https://github.com/TeledyneLeCroy/SignalIntegrity/wiki/Installation) for installation instructions.

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