* Add bidirectional communication channel between host and FPGA: xscomm.py.
0.1.12
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* Added graphical front-end to XSTOOLs: gxstools.py.
0.1.11
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* Fixed bit direction for checking status bits in xsi2c.py.
0.1.10
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* Added support for XuLA2-LX9 board.
0.1.9
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* Added ability to load Xilinx bitstream files directly into serial configuration flash. * Fixed byte order of addresses sent to the W25X serial flash.
0.1.8
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* Fixed FlashDev class so address bounds could not go outside the min/max addresses for the device.