Rapidwright

**Release Notes:**
* Parallelism enabled by default (365), can be turned off with:
- ParallelismTools.setParallel(false) or
- Set the environment variable to RW_PARALLEL=0.
* Contains bitstream relocation tools for specific UltraScale+ scenarios (334, 357, 373)
* EDIF netlist memory optimization - netlist uses ~70% less memory when loaded (339)
* Binary EDIF format - loads ~5x faster (writes ~2x slower) than plain-text EDIF. After EDIF reads
this format can be cached with setting the environment variable RW_ENABLE_EDIF_BINARY_CACHING (359)
* 'make update_jars' now pulls the jars from Maven Central instead of the rapidwright_jars.zip (366)
* Caches to a file the uncommon node map generated at runtime for a device (see 362)
* Includes PRs: 321, 343, 339, 352, 353, 348, 346, 362, 359, 361, 344, 357, 334, 365,
350, 366, 341, 370, 372, 373, 374, 375, 376, 377
* Fixes Issues: 117, 342, 349
- API Additions:
- com.xilinx.rapidwright.bitstream.Bitstream "public static void checkIfDeviceSupported(String partName)"
- com.xilinx.rapidwright.bitstream.BlockType "public static final BlockType[] values"
- com.xilinx.rapidwright.bitstream.ConfigArray "public static final int FRAME_OVERHEAD_COUNT_PER_ROW"
- com.xilinx.rapidwright.bitstream.OpCode "public static final OpCode[] values"
- com.xilinx.rapidwright.bitstream.PacketType "public static final PacketType[] values"
- com.xilinx.rapidwright.bitstream.RegisterType "public static final RegisterType[] values"
- com.xilinx.rapidwright.design.Module "public Module(Design design, String metadataFileName, boolean unrouteStaticNets)"
- com.xilinx.rapidwright.design.Module "public Module(Design design, boolean unrouteStaticNets)"
- com.xilinx.rapidwright.design.Module "public Site getCorrespondingSite(SiteInst inst, Site anchorSite)"
- com.xilinx.rapidwright.design.SiteInst "public Set<Net> getConnectedNets()"
- com.xilinx.rapidwright.device.Device "public static final String DEVICE_CACHE_FILE_VERSION"

**Release Notes:**
* 3-4X faster DCP write times using a new parallel, multi-threaded approach (See 337), Enable with:
- ParallelismTools.setParallel(true) or
- Add the environment variable RW_PARALLEL to the environment.
* Multiple DCP read operations can now be initiated in parallel without errors
* Fixes a number of issues related to SitePinInst creation on DCP load (see 317, 318)
* Adds a new MergeDesign capability, allows users to merge two or more existing designs into a
single implementation (See 331)
* All RapidWright dependencies and itself are published on Maven Central. Removes the need to
manually download rapidwright_jars.zip, instead users can simply run './gradlew update_jars'
* Includes PRs: 287, 291, 289, 297, 290 300, 296, 294, 304, 305, 313, 319, 324, 328,
320, 332, 330, 336, 331, 333, 322, 318, 317
* Fixes Issues: 326, 298, 299, 312, 315, 326
- API Additions:
- com.xilinx.rapidwright.design.Design "public void setName(String name)"
- com.xilinx.rapidwright.device.Site "public ClockRegion getClockRegion()"

**Release Notes:**
* Updates support for latest Vivado devices in 2021.2
* Adds flag information to BEL and BELPin objects (see API additions)
* Moves the RapidWrightDCP submodule to test/RapidWrightDCP
* Several Block Placer runtime and code improvements
* Adds a method to resolve site routing when combining designs built
from in-context builds into another design
* Adds Python support for CI
* Feature to catch System.exit() calls for Python REPL loops, not
turned on by default in Java 17 and later
* Adds DRC framework
* Fixes Issues: 195, 277, 283, 259
- API Additions:
- com.xilinx.rapidwright.device.BEL "public boolean isLUT()"
- com.xilinx.rapidwright.device.BEL "public boolean isFF()"
- com.xilinx.rapidwright.device.BEL "public boolean isCarry()"
- com.xilinx.rapidwright.device.BEL "public boolean isSRIMR()"
- com.xilinx.rapidwright.device.BEL "public boolean isSliceFFClkMod()"
- com.xilinx.rapidwright.device.BELPin "public boolean isPartOfBus()"
- com.xilinx.rapidwright.device.BELPin "public boolean isData()"
- com.xilinx.rapidwright.device.BELPin "public boolean isClock()"
- com.xilinx.rapidwright.device.BELPin "public boolean isEnable()"
- com.xilinx.rapidwright.device.BELPin "public boolean isSet()"
- com.xilinx.rapidwright.device.BELPin "public boolean isReset()"

**Release Notes:**
* Includes RWRoute - a full design timing driven router
* Moves online discussions and forum to GitHub Discussions
https://github.com/Xilinx/RapidWright/discussions (retiring Google Groups).
* Turns off Kryo Unsafe usage for Java 15 and above
* Better auto generation handling of readable EDIF files. Creates an
MD5 checksum for DCPs and unique directory for EDIFs to avoid stale EDIFs.
* Includes Python packaging files and adds the option to use local
development RapidWright build when RAPIDWRIGHT_PATH is set (see 267)
* Adds RapidWright relocation tools - the ability to relocate
implementations without using Modules/ModuleInsts.
* Includes a performance evaluation tool to leverage Vivado to
identify true fmax of a design.
* Improves PartNameTools to return integer values of available
resources of a part.
* Fixes Issues 259, 246, 73, 251, 190
- API Additions:
- com.xilinx.rapidwright.design.Design "public static boolean replaceEDIFinDCP(String dcpFileName, String edfFileName)"

**Release Notes:**
* Fixes ModuleInst anchor read issue when loading a RapidWright-generated DCP
* Adds correct macro expansion for BUFG and CFGLUT5 primitives
* For executable jars, the RapidWright default directory has been changed to ~/.local/share/RapidWright on Linux and %APPDATA%\RapidWright on Windows.
* Improvements in Utils and TileColumnPattern for URAM
* Adds dotty graph dump facilities for some logical and physical netlist classes
* Fixed an issue in PolynomialGenerator trying to create duplicate pins
* Various fixes around closing files and streams
* Includes fixes for 228, 238, 244
* Changes return type of Module "public RelocatableTileRectangle getBoundingBox()" from TileRectangle
- API Additions:
- com.xilinx.rapidwright.bitstream.Block "public boolean copyFrameData(Block block)"
- com.xilinx.rapidwright.bitstream.Frame "public boolean copyWords(Frame frame)"
- com.xilinx.rapidwright.design.Cell "public Cell createCell(EDIFHierCellInst inst, BEL bel)"
- com.xilinx.rapidwright.design.Net "public void unroutePin(SitePinInst p)"

**Release Notes:**
* Updates device models to the public set released in Vivado 2021.1
* Provides a cloud data file download-on-demand model. No longer need to
download large rapidwright_data.zip with each release. Speeds up
install and enables easier packaging/distribution of RapidWright.
* Adds support to automatically invoke Vivado to create a missing
EDIF file when loading a DCP (if a compatible Vivado is on user's PATH).
* Moves timing model files into git repo (out of data directory)
* Includes fixes for 180, 217