Siliconcompiler

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**Major:**

* Merged `sc-configure` into `sc-remote` to unify the remote interface

**Minor:**

* Fixed missing information in documentation build for flowgraphs.

* Removed call to `delete_job` on remote jobs, relying on remote to handle cleanup instead.

* Refactored core run functions for better code management.

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**Major:**

* Updated schema to remove unused ['option', 'skipstep'] key and add record to store the remote job id in ['record', 'remoteid'].

**Minor:**

* Added additional error checking and file cleanup to remote run to ensure empty files are not left behind.

* Fixed handling of setting list of tuples in the schema to corrected parse the values.

* Tools:

* OpenROAD - disabled timing optimizations by default, added support for generating report images in the screenshot task via ['tool', 'openroad', 'task', 'screenshot', 'var', 'include_report_images'].
* Chisel - added support for handling `build.sbt` via the input fileset ['input', 'config', 'chisel'].

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**Major:**

* Reworked FPGA to allow for better handling of FPGA parameters in the schema.
* Added missing mechanical parameters to the schema and updating the signal interface naming for clarity.
* Stop execution upon node failures, instead of continuing with repeated failures.

**Minor:**

* Ensure ['option', 'nodisplay'] is set when the environment does not support graphics.

* Added error checking for ['option', 'steplist'] to match current flowgraph.

* Removed physyn step from asicflow.

* Fixed issue when running remote and the submitted files are not updated.

* Tools:

* OpenROAD - update default value for [..., 'var', 'grt_macro_extension'] to '0' to allow for better routing.
* verilator - reworked options selection to allow for better control of user selected tool options.
* yosys - added support for blackboxes in libraries via ['library', \<lib\>, 'output', 'blackbox', 'verilog'].

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**Major:**

* Added graphs view to dashboard for comparing metrics across runs.

* Added ``sc-remote`` app for checking server status and interacting with running remote jobs (replaces ``sc-ping``).

**Minor:**

* Added checkbox to dashboard for enabling "raw" view of manifest.

* Tools:

* OpenROAD - made repair_design more verbose (requires updated version), added option to generate design images at end of task via ['tool', 'openroad', 'task', \<task\>, 'var', 'ord_enable_images'], tweaked pin placement behavior, added SDF file output to export task.
* surelog - fixed driver to sanitize escape characters in Verilog output, added option to disable write cache via ['tool', 'surelog', 'task', 'parse', 'var', 'disable_write_cache'].
* klayout - added option to allow missing cells in stream files via ['library', \<lib\>, 'option', 'var', 'klayout_allow_missing_cell'], added option to set DB units via ['pdk', \<pdk\>, 'var', 'klayout', 'units', \<stackup\>].

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**Minor:**

* Improved remote run reliability, including graceful time-outs when server not responding and thread-safety fixes.

* Added ['option', 'libext'] support for Surelog, Verilator, and Icarus.

* Removed dashboard support for Python 3.6.

* Made aesthetic tweaks to dashboard.

* Fixed bundled Surelog on pre-macOS 12.

* Tools:

* yosys - fixed synthesis strategies.
* verilator - added multithreading, added FST trace format support.
* OpenROAD - bumped minimum version to better support IR drop analysis, added additional controls for abstract LEF generation, updated scripts to improve `ORFS <https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts>`_ correspondence, fixed to use correct layers for parasitic estimation.

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**Major:**

* Added dashboard to SiliconCompiler to allow better inspection of the run information and added `sc-dashboard` app to open and display the dashboard.

**Minor:**

* Added ['input', 'constraint', 'upf'] as a recognized format

* Tools:

* surelog - added support for lowmem option via ['tool', 'surelog', 'task', 'parse', 'var', 'enable_lowmem']