Kratos

Added
- Parallel visit framework for IR (22)
- Remove unused stmt pass
- API to control how many CPUs to use in compilation
- Insert pipeline registers pass
- Debug info in if statement
- Array interface up to 2D array
- Lots of helper functions in Python front-end, including `zext`, `input` etc.

Changed:
- Remove `PortArray` since the array interface is unified.
- `PassManager` is refactored. Users now have the complete freedom on what passes
to run and reuse (54).
- Unique naming function is changed so that if will attempt to create names without
`count`.
- All extern modules have been updated to the latest.

Fixed
- Fix `remove_unused_var` (55).
- Fix `move_src_to` due to the changes of where to store the statements
- Fix port array code gen
- Fix code gen bug in if statement
- Fix pyast statement generation for nested statements

Added
- Proper source code distribution for compiling form scratch (PyPI)
- Array support variable declaration in generator
- ScopedStatement for better IR and code quality (52)
- `ctest` to travis CI.
- Add more robust merge wire logic
- Lots of syntax sugar in Python front-end (53)
- Add `clog2()`

Changed
- Generator instance has to be unique in C++
- Add statement will return itself in reference
- Remove `assign()` side-effects (48)
- Split Python bindings into multiple files to speed up the build process.

Fixed
- Generator name is wrong in Python front-end
- Incorrect cache logic in `combinational()` and `sequential()`
- Fix a bug in source/sink movement due to the change in how connections are stored in slices.

Added
- Port Assignment check in SV codegen.
- Macos build on travis

Changed
- remove slang dependency (44).
- Code adjustment to make the code base cross-platform.

Fixed
- Port const test

Added
- Stmt remove APIs (41).
- API doc generation.
- `kratos` namespace in C++ source files (37)

Changed:
- IR attributes share the memory pointer
- Rename AST to IR.

Fixed
- `instance_name` in the python `Generator` class
- Parallel hashing needs to use leveled generators.
- Generator unique names logic was wrong.
- Typos in documentation (40).

Added
- More comprehensive documentation that covers the statements.
- Add visual debugger through `kratos-debug`.
- Add full support for attributes on IR node (33).
- Parallel hash implementation (27).
- Merge wire pass (38).
- More debugging info related to module instantiation.
- Add helper function to create combinational/sequential blocks.

Changed:
- Adjusted `clone`/`create` interface (36)

Fixed:
- Decouple port wires pass naming.

Added
- Documentation for most of the interfaces (28)
- Support for SystemVerilog Packed Struct in port interface (20)
- Debug info for fanout pass.
- Add variable and parameter proxy (30)
- Add type cast interface (31)
- Helper function to produce the verilog file

Changed:
- `clone`/`create` interface has been improved (32). A lot of work still need to be done.
- `signed` is now created using the new casting interface.

Fixed
- Pass through module removal pass will sometimes remove modules that perform simple arithmetic.
- Fix a bug where module instantiation will cause infinite loop.